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Vertical Compute
Front End Rtl Designer / Soc Integration
Remote · Full time · Mid level
About the role
Contribute to building Vertical Compute's 3D-integrated chiplets focusing on top-level SoC integration. Collaborate with verification and physical design teams to ensure Power, Performance, and Area targets.
What you’ll do
• Lead top-level SoC and chiplet integration. • Integrate Vertical Integrated Memory (VIM™) with compute engines. • Build verification environments and debug RTL issues. • Collaborate with physical design for PPA optimization.
What you’ll bring
• Experience in front-end RTL design and SoC/chiplet integration. • Degree in Electrical or Computer Engineering or related field. • Strong skills in SystemVerilog/Verilog and IP integration. • Good communication and collaborative problem-solving skills. • Fluency in English.
About Vertical Compute
Vertical Compute develops proprietary Vertical Integrated Memory (VIM™) chiplets to make AI hardware faster, greener, and more scalable. Founded in 2024 and backed by €57M funding.